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FAST CMOS OCTAL LATCHED TRANSCEIVER
Integrated Device Technology, Inc.
IDT54/74FCT543T/AT/CT/DT IDT54/74FCT2543T/AT/CT
FEATURES:
* Common features: - Low input and output leakage 1A (max.) - CMOS power levels - True TTL input and output compatibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) - Meets or exceeds JEDEC standard 18 specifications - Product available in Radiation Tolerant and Radiation Enhanced versions - Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) - Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages * Features for FCT543T: - Std., A, C and D speed grades - High drive outputs (-15mA IOH, 64mA IOL) - Power off disable outputs permit "live insertion" * Features for FCT2543T: - Std., A, and C speed grades - Resistor outputs (-15mA IOH, 12mA IOL Com.) (-12mA IOH, 12mA IOL Mil.) - Reduced system switching noise
DESCRIPTION:
The FCT543T/FCT2543T is a non-inverting octal transceiver built using an advanced dual metal CMOS technology. This device contains two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be LOW in order to enter data from A0-A7 or to take data from B0-B7, as indicated in the Function Table. With CEAB LOW, a LOW signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both LOW, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the CEBA, LEBA and OEBA inputs. The FCT2543T has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times-reducing the need for external series terminating resistors. FCT2xxxT parts are plug-in replacements for FCTxxxT parts.
FUNCTIONAL BLOCK DIAGRAM
DETAIL A D LE A0 Q D LE Q B0
A1 A2 A3 A4 A5 A6 A7 DETAIL A x 7
B1 B2 B3 B4 B5 B6 B7
OEBA OEAB CEBA LEBA
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
CEAB
2613 drw 01
LEAB
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1995 Integrated Device Technology, Inc.
JANUARY 1995
DSC-4203/5
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IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
INDEX
11 12
14 13
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A7 CEAB GND NC OEAB LEAB B7
LEBA OEBA A0 A1 A2 A3 A4 A5 A6 A7 CEAB GND
1 2 3 4 5 6 7 8 9 10
24 23 22
P24-1 D24-1 SO24-2 SO24-7 SO24-8 & E24-1
21 20 19 18 17 16 15
Vcc CEBA B0 B1 B2 B3 B4 B5 B6 B7 LEAB OEAB
A0 OEBA LEBA NC Vcc CEBA B0
4 3 2 1 28 27 26 25 24 23 22 21 20 5 6 7 8 9 10
PIN CONFIGURATIONS
A1 A2 A3 NC A4 A5 A6
L28-1
11 19 12 13 14 15 16 17 18
B1 B2 B3 NC B4 B5 B6
2613 drw 03
DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW
LCC TOP VIEW
PIN DESCRIPTION
Pin Names Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs
2613 tbl 01
FUNCTION TABLE(1, 2)
For A-to-B (Symmetric with B-to-A)
Inputs Latch Status Output Buffers B0-B7 High Z -- High Z Current A Inputs Previous* A Inputs
OEAB OEBA CEAB CEBA LEAB LEBA
A0-A7 B0-B7
CEAB
H -- -- L L
LEAB
-- H -- L H
OEAB
-- -- H L L
A-to-B Storing Storing -- Transparent Storing
ABSOLUTE MAXIMUM RATINGS
Symbol Rating Commercial VTERM(2) Terminal Voltage -0.5 to +7.0 with Respect to GND VTERM(3) Terminal Voltage -0.5 to with Respect to VCC +0.5 GND TA Operating 0 to +70 Temperature TBIAS Temperature -55 to +125 Under Bias TSTG Storage -55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current -60 to +120
(1)
Military -0.5 to +7.0 Unit V
NOTES: 2613 tbl 02 1. * Before LEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level -- = Don't Care or Irrelevant 2. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA and OEBA.
-0.5 to VCC +0.5 -55 to +125 -65 to +135 -65 to +150 0.5 -60 to +120
V C C C W mA
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. Unit 10 pF 12
pF
2613 lnk 04
NOTE: 1. This parameter is measured at characterization but not tested.
2613 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only.
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IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL II VIK VH ICC Parameter Input HIGH Level Input LOW Level Input HIGH Input LOW Current (4) Current (4) VCC = Max. pins) (4) VCC = Min., IIN = -18mA
--
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V VCC = Max., VI = VCC (Max.)
Min. 2.0 -- -- -- -- -- -- -- -- --
Typ.(2) -- -- -- -- -- -- -- -0.7 200 0.01
Max. -- 0.8
Unit V V
1 1 1 1 1
-1.2 -- 1
A A A
V mV mA
2613 lnk 05
High Impedance Output Current (3-State Output Input HIGH Current (4)
Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
OUTPUT DRIVE CHARACTERISTICS FOR 543T/AT/CT/DT
Symbol VOH Parameter Output HIGH Voltage Test Conditions(1) VCC = Min. IOH = -6mA MIL. VIN = VIH or VIL IOH = -8mA COM'L. IOH = -12mA MIL. IOH = -15mA COM'L. VCC = Min. IOL = 48mA MIL. VIN = VIH or VIL IOL = 64mA COM'L. VCC = Max., VO = GND (3) Leakage(5) VCC = 0V, VIN or VO 4.5V Min. 2.4 2.0 -- -60 -- Typ.(2) 3.3 3.0 0.3 -120 -- Max. -- -- 0.55 -225 1 Unit V V V mA A
2613 lnk 06
VOL IOS IOFF
Output LOW Voltage Short Circuit Current Input/Output Power Off
OUTPUT DRIVE CHARACTERISTICS FOR 2543T/AT/CT/DT
Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V (3) VCC = 5V, VIN = VIH or V IL, VOUT = 1.5V (3) VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOH = -12mA MIL. IOH = -15mA COM'L. IOL = 12mA Min. 16 -16 2.4 -- Typ.(2) 48 -48 3.3 0.3 Max. -- -- -- 0.50 Unit mA mA V V
2613 lnk 07
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C. 5. This parameter is guaranteed but not tested.
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IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = 3.4V(3) VCC = Max., Outputs Open CEAB and OEAB = GND CEBA = VCC One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC Eight Bits Toggling at fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND FCTxxxT FCT2xxxT Test Conditions(1) Min. Typ.(2) Max. -- -- -- 0.5 0.15 0.06 2.0 0.25 0.12 Unit mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
FCTxxxT FCT2xxxT
-- -- -- -- -- -- -- --
1.5 0.6 2.0 1.1 3.8 1.5 6.0 3.8
3.5 2.2 5.5 4.2 7.3(5) 4.0(5) 16.3(5) 13.0(5)
mA
VIN = 3.4V VIN = GND
FCTxxxT FCT2xxxT
VIN = VCC VIN = GND
FCTxxxT FCT2xxxT
VIN = 3.4V VIN = GND
FCTxxxT FCT2xxxT
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz.
2613 tbl 08
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IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT543T/ FCT2543T Com'l. Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay Transparant Mode An to Bn or Bn to An Propagation Delay LEBA to An, LEAB to Bn Output Enable Time OEBA or OEAB to An or Bn CEBA or CEAB to An or Bn Output Disable Time OEBA or OEAB to An or Bn CEBA or CEAB to An or Bn Set-up Time, HIGH or LOW An or Bn to LEBA or LEAB Hold Time, HIGH or LOW An or Bn to LEBA or LEAB LEBA or LEAB Pulse Width LOW Condition(1) CL = 50pF RL = 500 Min.(2) 1.5 Max. 8.5 Mil. Min.(2) 1.5 Max. 10.0 Min.(2) 1.5 FCT543AT/ FCT2543AT Com'l. Max. 6.5 Mil. Min. (2) 1.5 Max. 7.5 Unit ns
1.5 1.5
12.5 12.0
1.5 1.5
14.0 14.0
1.5 1.5
8.0 9.0
1.5 1.5
9.0 10.0
ns ns
1.5
9.0
1.5
13.0
1.5
7.5
1.5
8.5
ns
3.0 2.0 5.0
-- -- --
3.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
ns ns ns
2513 tbl 09
FCT543CT/ FCT2543CT Com'l. Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay Transparant Mode An to Bn or Bn to An Propagation Delay LEBA to An, LEAB to Bn Output Enable Time OEBA or OEAB to An or Bn CEBA or CEAB to An or Bn Output Disable Time OEBA or OEAB to An or Bn CEBA or CEAB to An or Bn Set-up Time, HIGH or LOW An or Bn to LEBA or LEAB Hold Time, HIGH or LOW An or Bn to LEBA or LEAB LEBA or LEAB Pulse Width LOW Condition(1) CL = 50pF RL = 500 Min.(2) 1.5 Max. 5.3 1.5 Mil. Min.(2) Max. 6.1 Min.(2) 1.5 FCT543DT Com'l. Max. 4.4 -- Mil. Min. (2) Max. -- Unit ns
1.5 1.5
7.0 8.0
1.5 1.5
8.0 9.0
1.5 1.5
5.0 5.4
-- --
-- --
ns ns
1.5
6.5
1.5
7.5
1.5
4.3
--
--
ns
2.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
1.5 1.5 3.0 (3)
-- -- --
-- -- --
-- -- --
ns ns ns
2513 tbl 10
NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This limit is guaranteed but not tested.
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IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL
2513 drw 05
SWITCH POSITION
Test
7.0V
Switch
Open Drain Disable Low Enable Low All Other Tests
Closed
VOUT
Open
500
2513 lnk 11 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU
tH
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
2513 drw 06
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
tREM
1.5V
2513 drw 07
tSU
tH
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 1.5V 0V 3.5V 1.5V tPHZ 0.3V VOH 0V
2513 drw 09
SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL
3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
2513 drw 08
tPLZ
1.5V 0V 3.5V 0.3V VOL
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
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IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT X FCT X XXXX Device Type X Package X Process
Temperature Range
Family
Blank B P D SO L E PY Q 543T 543AT 543CT 543DT Blank 2 54 74
Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Shrink Small Outline Package Quarter-size Small Outline Package Octal Latched Transceiver
High Drive Balanced Drive -55C to +125C 0 to +70C
2613 drw 10
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